Real-Time Stereo Vision Through Optimized FPGA Disparity Algorithms

Stereovision is the technique through which it is possible to reconstruct depth information from two images of the same scene captured by two cameras placed a certain distance apart. One of the most critical aspects is the possibility of obtaining three-dimensional information in real-time, due to the high computa-tional capacity required by conventional algorithms. Real-time reconstruction is necessary in applications in the biomedical field, as well as in robotics or automo-tive. This paper presents an FPGA-optimized implementation of a local disparity estimation algorithm based on Sum of Absolute Differences, designed for high-throughput stereo vision systems. The proposed system can compute the disparity map at a frame rate of 292 fps for VGA (640x480) images at a target clock fre-quency of 100 MHz, calling to 873 fps for VGA images and at clock frequency of 300 MHz. The design, developed with Vitis HLS and synthesized for a Xilinx UltraScale + FPGA, demonstrates low-latency, power efficiency, and suitability for embedded applications.