Design Space Exploration of Parallel Embedded Architectures for Native Clifford Algebra Operations

In the past few decades, Geometric or Clifford algebra (CA) has received a growing attention in many research fields, such as robotics, machine vision and computer graphics, as a natural and intuitive way to model geometric objects and their transformations. At the same time, the high dimensionality of Clifford algebra and its computational complexity demand specialized hardware architectures for the direct support of Clifford data types and operators. This paper presents the design space exploration of parallel embedded architectures for native execution of four-dimensional (4D) and five-dimensional (5D) Clifford algebra operations. The design space exploration has been described along with a performance comparison of the various architectures for different sets of the architectural parameters, such as Clifford operations dimension, element representation, execution flow, number of used multipliers, precision, and instruction word length. Different architectures addressing the above issues have been implemented and compared in terms of area cost (number of FPGA slices), number of clock cycles, computation error, and speed-up. Execution analysis of a significant application of CA in computer graphics, a raytracer, is also presented.