The transfer characteristics (ID–VG) of multilayers MoS2 transistors with a SiO2/Si backgate and Ni source/drain contacts have been measured on as-prepared devices and after annealing at different temperatures (Tann from 150 °C to 200 °C) under a positive bias ramp (VG from 0 V to +20 V). Larger Tann resulted in a reduced hysteresis of the ID–VG curves (from ∼11 V in the as-prepared sample to ∼2.5 V after Tann at 200 °C). The field effect mobility (∼30 cm2 V–1 s–1) remained almost unchanged after the annealing. On the contrary, the subthreshold characteristics changed from the common n-type behaviour in the as-prepared device to the appearance of a low current hole inversion branch after annealing. This latter effect indicates a modification of the Ni/MoS2 contact that can be explained by the formation of a low density of regions with reduced Schottky barrier height (SBH) for holes embedded in a background with low SBH for electrons. Furthermore, a temperature dependent analysis of the subthreshold characteristics revealed a reduction of the interface traps density from ∼9 × 1011 eV–1cm–2in the as-prepared device to ∼2 × 1011 eV–1cm–2after the 200 °C temperature–bias annealing, which is consistent with the observed hysteresis reduction. (Figure presented.) Schematic representation of a back-gated multilayer MoS2 field effect transistor (left) and transfer characteristics (right) measured at 25 °C on an as-prepared device and after the temperature–bias annealing at 200 °C under a positive gate bias ramp from 0 V to +20 V.

Giannazzo, F., Fisichella, G., Piazza, A., Di Franco, S., Greco, G., Agnello, S., et al. (2016). Effect of temperature–bias annealing on the hysteresis and subthreshold behavior of multilayer MoS2 transistors. PHYSICA STATUS SOLIDI. RAPID RESEARCH LETTERS, 10(11), 797-801 [10.1002/pssr.201600209].

Effect of temperature–bias annealing on the hysteresis and subthreshold behavior of multilayer MoS2 transistors

AGNELLO, Simonpietro;
2016-01-01

Abstract

The transfer characteristics (ID–VG) of multilayers MoS2 transistors with a SiO2/Si backgate and Ni source/drain contacts have been measured on as-prepared devices and after annealing at different temperatures (Tann from 150 °C to 200 °C) under a positive bias ramp (VG from 0 V to +20 V). Larger Tann resulted in a reduced hysteresis of the ID–VG curves (from ∼11 V in the as-prepared sample to ∼2.5 V after Tann at 200 °C). The field effect mobility (∼30 cm2 V–1 s–1) remained almost unchanged after the annealing. On the contrary, the subthreshold characteristics changed from the common n-type behaviour in the as-prepared device to the appearance of a low current hole inversion branch after annealing. This latter effect indicates a modification of the Ni/MoS2 contact that can be explained by the formation of a low density of regions with reduced Schottky barrier height (SBH) for holes embedded in a background with low SBH for electrons. Furthermore, a temperature dependent analysis of the subthreshold characteristics revealed a reduction of the interface traps density from ∼9 × 1011 eV–1cm–2in the as-prepared device to ∼2 × 1011 eV–1cm–2after the 200 °C temperature–bias annealing, which is consistent with the observed hysteresis reduction. (Figure presented.) Schematic representation of a back-gated multilayer MoS2 field effect transistor (left) and transfer characteristics (right) measured at 25 °C on an as-prepared device and after the temperature–bias annealing at 200 °C under a positive gate bias ramp from 0 V to +20 V.
2016
Settore FIS/01 - Fisica Sperimentale
Giannazzo, F., Fisichella, G., Piazza, A., Di Franco, S., Greco, G., Agnello, S., et al. (2016). Effect of temperature–bias annealing on the hysteresis and subthreshold behavior of multilayer MoS2 transistors. PHYSICA STATUS SOLIDI. RAPID RESEARCH LETTERS, 10(11), 797-801 [10.1002/pssr.201600209].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10447/225204
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