In this paper nanocrystals memories program curves are shown and their saturation points (steady state condition) can be observed. We present a model that relates the voltage shift at the steady state (ΔVTss) to the gate program voltage (VG). Starting from a good agreement between experimental data and simulations for nanocrystals memory cells with a conventional dielectric structure (SiO2), we present the estimated values of the ΔVTss vs VG for different control stacks. Our investigation shows an improvement if a material with a high dielectric constant and a small conduction band-offset with respect to the SiO2, is placed between two SiO2 layers when the first of them is very thin. © 2004 Elsevier Ltd. All rights reserved.
Spitale, E., Corso, D., Crupi, I., Lombardo, S., Gerardi, C. (2005). Improvement of the P/E window in nanocrystal memories by the use of high-k materials in the control dielectric. MICROELECTRONICS RELIABILITY, 45(5-6), 895-898 [10.1016/j.microrel.2004.11.029].
Improvement of the P/E window in nanocrystal memories by the use of high-k materials in the control dielectric
Crupi, Isodiana;
2005-01-01
Abstract
In this paper nanocrystals memories program curves are shown and their saturation points (steady state condition) can be observed. We present a model that relates the voltage shift at the steady state (ΔVTss) to the gate program voltage (VG). Starting from a good agreement between experimental data and simulations for nanocrystals memory cells with a conventional dielectric structure (SiO2), we present the estimated values of the ΔVTss vs VG for different control stacks. Our investigation shows an improvement if a material with a high dielectric constant and a small conduction band-offset with respect to the SiO2, is placed between two SiO2 layers when the first of them is very thin. © 2004 Elsevier Ltd. All rights reserved.File | Dimensione | Formato | |
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