In this paper, a low-power design method for MCML based ring oscillators is presented. The proposed method takes into account the parasitic capacitances of the MOS transistors. To validate it, some ring oscillators with different oscillation frequencies were designed in a 0.18 mum CMOS technology. SPICE simulations demonstrate the effectiveness of the design method

CARUSO G, MACCHIARELLA A (2007). A Design Methodology for Low-Power MCML Ring Oscillators. In 18th European Conference on Circuit Theory and Design (pp.675-678) [10.1109/ECCTD.2007.4529686].

A Design Methodology for Low-Power MCML Ring Oscillators

CARUSO, Giuseppe;
2007-01-01

Abstract

In this paper, a low-power design method for MCML based ring oscillators is presented. The proposed method takes into account the parasitic capacitances of the MOS transistors. To validate it, some ring oscillators with different oscillation frequencies were designed in a 0.18 mum CMOS technology. SPICE simulations demonstrate the effectiveness of the design method
ECCTD 2007
Seville, Spain
August 26-30, 2007
18
2007
4
CARUSO G, MACCHIARELLA A (2007). A Design Methodology for Low-Power MCML Ring Oscillators. In 18th European Conference on Circuit Theory and Design (pp.675-678) [10.1109/ECCTD.2007.4529686].
Proceedings (atti dei congressi)
CARUSO G; MACCHIARELLA A
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10447/14590
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