THis work describes a full implementation of a reconfigurable IEEE 802.11 Medium Access Control (MAC) in FPGA using a System on Chip (SoC) architecture. The proposed implementation has been designed with a great structural flexibility, so to ease the protocol modification, and to support Quality of Service (QoS) function. Estensive tests has been carried out showing a full compliance to the 802.11 standard timing and algorithms.

DI STEFANO A; TERRAZZINO G; GIACONIA GC (April, 2006).FPGA Implementation of a Reconfigurable 802.11 Medium Access Control.

FPGA Implementation of a Reconfigurable 802.11 Medium Access Control

DI STEFANO A;TERRAZZINO G;GIACONIA GC

Abstract

THis work describes a full implementation of a reconfigurable IEEE 802.11 Medium Access Control (MAC) in FPGA using a System on Chip (SoC) architecture. The proposed implementation has been designed with a great structural flexibility, so to ease the protocol modification, and to support Quality of Service (QoS) function. Estensive tests has been carried out showing a full compliance to the 802.11 standard timing and algorithms.
FPGA implementation, 802.11 WLAN, System on Chip, Reconfigurable Architecture
DI STEFANO A; TERRAZZINO G; GIACONIA GC (April, 2006).FPGA Implementation of a Reconfigurable 802.11 Medium Access Control.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10447/21055
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